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Comparing Floating-point and Logarithmic Number Representations for Reconfigurable Acceleration

Haohuan Fu, Oskar Mencer, Wayne Luk

Poster
IEEE International Conference on Field-Programmable Technology (FPT)
2006
pp.337–340
DOI 10.1109/FPT.2006.270342
Abstract

We investigate floating-point and logarithmic number

representations for computing with FPGAs. The key issue is

to select the best number format for an application to improve

performance and accuracy. Using A Stream Compiler, ASC

as the hardware design and compilation tool, we develop a

convenient scheme to compare the designs of both floating-point

and logarithmic numbers and select the solution with the best

performance and accuracy. Our contributions are: (1) optimized

function evaluations for conversions between logarithmic and

floating-point numbers; (2) design and implementation of logarithmic

arithmetic, with optimized segmentation and polynomial

degree; (3) a practical comparison case study of Monte Carlo

radiative heat transfer simulation. Compared to prior work, our

design supports two to six times more LNS conversion and LNS

arithmetic units on one FPGA. For Monte Carlo simulation,

our designs of both number systems produce 39-80% higher

throughput with either a smaller area or a higher accuracy.

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