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MiniBit: Bit-width optimization via affine arithmetic

Dong-U Lee, Altaf Abdul Gaffar, Wayne Luk, Oskar Mencer

Conference or Workshop Paper
DAC'05, Design Automation Conference
July, 2005
DOI 10.1145/1065579.1065799

MiniBit, our automated approach for optimizing bit-widths of fixed-point designs is based on static analysis via affine arithmetic. We describe methods to minimize both the integer and fraction parts of fixed-point signals with the aim of minimizing circuit area.

Our range analysis technique identifes the number of integer bits required. For precision analysis, we employ a semi-analytical approach with analytical error models in conjunction with adaptive simulated annealing to find the optimum number of fraction bits. Improvements for a given design reduce area and latency by up to 20% and 12% respectively, over optimum uniform fraction bit-widths on a Xilinx Virtex-4 FPGA.

BibTEX file for the publication built & maintained by Ashok Argent-Katwala.